Priority Based Error Correction Code (ECC) for the Embedded SRAM Memories in H.264 System
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Insoo | - |
dc.contributor.author | Kwon, Jinmo | - |
dc.contributor.author | Park, Jangwon | - |
dc.contributor.author | Park, Jongsun | - |
dc.date.accessioned | 2021-09-05T19:40:42Z | - |
dc.date.available | 2021-09-05T19:40:42Z | - |
dc.date.created | 2021-06-15 | - |
dc.date.issued | 2013-11 | - |
dc.identifier.issn | 1939-8018 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/101740 | - |
dc.description.abstract | With aggressive supply voltage scaling, SRAM bit-cell failures in the embedded memory of the H.264 system result in significant degradation to video quality. Error Correction Coding (ECC) has been widely used in the embedded memories in order to correct these failures, however, the conventional ECC approach does not consider the differences in the importance of the data stored in the memory. This paper presents a priority based ECC (PB-ECC) approach, where the more important higher order bits (HOBs) are protected with higher priority than the less important lower order bits (LOBs) since the human visual system is less sensitive to LOB errors. The mathematical analysis regarding the error correction capability of the PB-ECC scheme and its resulting peak signal-to-noise ratio(PSNR) degradation in H.264 system are also presented to help the designers to determine the bit-allocation of the higher and lower priority segments of the embedded memory. We designed and implemented three PB-ECC cases (Hamming only, BCH only, and Hybrid PB-ECC) using 90 nm CMOS technology. With the supply voltage at 900 mV or below, the experiment results delivers up to 6.0 dB PSNR improvement with a smaller circuit area compared to the conventional ECC approach. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | SPRINGER | - |
dc.subject | LOW-VOLTAGE OPERATION | - |
dc.subject | ARCHITECTURE DESIGN | - |
dc.title | Priority Based Error Correction Code (ECC) for the Embedded SRAM Memories in H.264 System | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Park, Jongsun | - |
dc.identifier.doi | 10.1007/s11265-013-0736-4 | - |
dc.identifier.scopusid | 2-s2.0-84881481080 | - |
dc.identifier.wosid | 000322738600002 | - |
dc.identifier.bibliographicCitation | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, v.73, no.2, pp.123 - 136 | - |
dc.relation.isPartOf | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY | - |
dc.citation.title | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY | - |
dc.citation.volume | 73 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 123 | - |
dc.citation.endPage | 136 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | LOW-VOLTAGE OPERATION | - |
dc.subject.keywordPlus | ARCHITECTURE DESIGN | - |
dc.subject.keywordAuthor | Error control code | - |
dc.subject.keywordAuthor | Embedded SRAM | - |
dc.subject.keywordAuthor | Low voltage operation | - |
dc.subject.keywordAuthor | H.264 | - |
dc.subject.keywordAuthor | Multimedia | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
(02841) 서울특별시 성북구 안암로 14502-3290-1114
COPYRIGHT © 2021 Korea University. All Rights Reserved.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.