Gate All Around Metal Oxide Field Transistor: Surface Potential Calculation Method including Doping and Interface Trap Charge and the Effect of Interface Trap Charge on Subthreshold Slope
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Najam, Faraz | - |
dc.contributor.author | Kim, Sangsig | - |
dc.contributor.author | Yu, Yun Seop | - |
dc.date.accessioned | 2021-09-05T20:36:04Z | - |
dc.date.available | 2021-09-05T20:36:04Z | - |
dc.date.created | 2021-06-15 | - |
dc.date.issued | 2013-10 | - |
dc.identifier.issn | 1598-1657 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/101985 | - |
dc.description.abstract | An explicit surface potential calculation method of gate-all-around MOSFET (GAAMOSFET) devices which takes into account both interface trap charge and varying doping levels is presented. The results of the method are extensively verified by numerical simulation. Results from the model are used to find qualitative and quantitative effect of interface trap charge on subthreshold slope (SS) of GAAMOSFET devices. Further, design constraints of GAAMOSFET devices with emphasis on the effect of interface trap charge on device SS performance are investigated. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | IEEK PUBLICATION CENTER | - |
dc.subject | COMPACT MODEL | - |
dc.subject | MOSFETS | - |
dc.title | Gate All Around Metal Oxide Field Transistor: Surface Potential Calculation Method including Doping and Interface Trap Charge and the Effect of Interface Trap Charge on Subthreshold Slope | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Sangsig | - |
dc.identifier.doi | 10.5573/JSTS.2013.13.5.530 | - |
dc.identifier.scopusid | 2-s2.0-84886916173 | - |
dc.identifier.wosid | 000327471900015 | - |
dc.identifier.bibliographicCitation | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.13, no.5, pp.530 - 537 | - |
dc.relation.isPartOf | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.citation.title | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.citation.volume | 13 | - |
dc.citation.number | 5 | - |
dc.citation.startPage | 530 | - |
dc.citation.endPage | 537 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.identifier.kciid | ART001814414 | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.description.journalRegisteredClass | kci | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | COMPACT MODEL | - |
dc.subject.keywordPlus | MOSFETS | - |
dc.subject.keywordAuthor | Compact model | - |
dc.subject.keywordAuthor | drain-source current | - |
dc.subject.keywordAuthor | gate-all-around metal-oxide-semiconductor-field-effect-transistor (GAAMOSFET) | - |
dc.subject.keywordAuthor | interface trap distribution | - |
dc.subject.keywordAuthor | scaling theory | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
(02841) 서울특별시 성북구 안암로 14502-3290-1114
COPYRIGHT © 2021 Korea University. All Rights Reserved.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.