Interface Trap Density of Gate-All-Around Silicon Nanowire Field-Effect Transistors With TiN Gate: Extraction and Compact Model
DC Field | Value | Language |
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dc.contributor.author | Najam, Faraz | - |
dc.contributor.author | Yu, Yun Seop | - |
dc.contributor.author | Cho, Keun Hwi | - |
dc.contributor.author | Yeo, Kyoung Hwan | - |
dc.contributor.author | Kim, Dong-Won | - |
dc.contributor.author | Hwang, Jong Seung | - |
dc.contributor.author | Kim, Sansig | - |
dc.contributor.author | Hwang, Sung Woo | - |
dc.date.accessioned | 2021-09-05T23:16:55Z | - |
dc.date.available | 2021-09-05T23:16:55Z | - |
dc.date.issued | 2013-08 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.issn | 1557-9646 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/102580 | - |
dc.description.abstract | Si/SiO2 interface trap charge distribution of cylindrical cross-sectioned gate-all-around silicon nanowire field-effect transistor is extracted by using three-dimensional simulation. While the interface chemistry of conventional gatestack (Si/SiO2 polysilicon) in conventional planar devices is well documented, not much work is available on interface trap distribution D-it of alternate gatestacks (gatestacks employing alternate gate materials) in silicon nanowire MOSFET devices. Furthermore, a compact drain current model with interface trap charge parameter is presented. The model is based on gradual channel approximation and uses self-consistent calculation of interface trap charge and surface potential to reproduce experimental current-voltage characteristics. | - |
dc.format.extent | 7 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Interface Trap Density of Gate-All-Around Silicon Nanowire Field-Effect Transistors With TiN Gate: Extraction and Compact Model | - |
dc.type | Article | - |
dc.publisher.location | 미국 | - |
dc.identifier.doi | 10.1109/TED.2013.2268193 | - |
dc.identifier.scopusid | 2-s2.0-84880891976 | - |
dc.identifier.wosid | 000322124100004 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON ELECTRON DEVICES, v.60, no.8, pp 2457 - 2463 | - |
dc.citation.title | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.citation.volume | 60 | - |
dc.citation.number | 8 | - |
dc.citation.startPage | 2457 | - |
dc.citation.endPage | 2463 | - |
dc.type.docType | Article | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | sci | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | METAL-GATE | - |
dc.subject.keywordPlus | ELECTRON-MOBILITY | - |
dc.subject.keywordPlus | VARIABILITY | - |
dc.subject.keywordPlus | MOSFETS | - |
dc.subject.keywordPlus | FLUCTUATION | - |
dc.subject.keywordPlus | IMPACT | - |
dc.subject.keywordAuthor | Compact model | - |
dc.subject.keywordAuthor | drain-source current | - |
dc.subject.keywordAuthor | gate-all-around metal-oxide-semiconductor-field-effect-transistor | - |
dc.subject.keywordAuthor | (GAAMOSFET) | - |
dc.subject.keywordAuthor | interface trap distribution | - |
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