Vertically Integrated Logic Circuits Constructed Using ZnO-Nanowire-Based Field-Effect Transistors on Plastic Substrates
DC Field | Value | Language |
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dc.contributor.author | Kang, Jeongnnin | - |
dc.contributor.author | Moon, Taeho | - |
dc.contributor.author | Jeon, Youngin | - |
dc.contributor.author | Kim, Hoyoung | - |
dc.contributor.author | Kim, Sangsig | - |
dc.date.accessioned | 2021-09-06T02:12:38Z | - |
dc.date.available | 2021-09-06T02:12:38Z | - |
dc.date.created | 2021-06-18 | - |
dc.date.issued | 2013-05 | - |
dc.identifier.issn | 1533-4880 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/103422 | - |
dc.description.abstract | ZnO-nanowire-based logic circuits were constructed by the vertical integration of multilayered field-effect transistors (FETs) on plastic substrates. ZnO nanowires with an average diameter of similar to 100 nm were synthesized by thermal chemical. vapor deposition for use as the channel material in FETs. The ZnO-based FETs exhibited a high I-ON/I-OFF of > 10(6), with the characteristic of n-type depletion modes. For vertically integrated logic circuits, three multilayer FETs were sequentially prepared. The stacked FETs were connected in series via electrodes, and C-PVPs were used for the layer-isolation material. The NOT and NAND gates exhibited large logic-swing values of similar to 93%. These results demonstrate the feasibility of three dimensional flexible logic circuits. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | AMER SCIENTIFIC PUBLISHERS | - |
dc.subject | BULK WAFERS | - |
dc.subject | RIBBONS | - |
dc.title | Vertically Integrated Logic Circuits Constructed Using ZnO-Nanowire-Based Field-Effect Transistors on Plastic Substrates | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Sangsig | - |
dc.identifier.doi | 10.1166/jnn.2013.7230 | - |
dc.identifier.wosid | 000319953300068 | - |
dc.identifier.bibliographicCitation | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.13, no.5, pp.3526 - 3528 | - |
dc.relation.isPartOf | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY | - |
dc.citation.title | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY | - |
dc.citation.volume | 13 | - |
dc.citation.number | 5 | - |
dc.citation.startPage | 3526 | - |
dc.citation.endPage | 3528 | - |
dc.type.rims | ART | - |
dc.type.docType | Article; Proceedings Paper | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Chemistry | - |
dc.relation.journalResearchArea | Science & Technology - Other Topics | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Chemistry, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Nanoscience & Nanotechnology | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
dc.subject.keywordPlus | BULK WAFERS | - |
dc.subject.keywordPlus | RIBBONS | - |
dc.subject.keywordAuthor | ZnO Nanowire | - |
dc.subject.keywordAuthor | Logic Circuit | - |
dc.subject.keywordAuthor | Field-Effect Transistor | - |
dc.subject.keywordAuthor | Vertical Integration | - |
dc.subject.keywordAuthor | Plastic Substrate | - |
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