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A CMOS-Process-Compatible ZnO-Based Charge-Trap Flash Memory
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Seo, Yujeong | - |
| dc.contributor.author | Song, Min Yeong | - |
| dc.contributor.author | An, Ho-Myoung | - |
| dc.contributor.author | Kim, Tae Geun | - |
| dc.date.accessioned | 2021-09-06T04:38:52Z | - |
| dc.date.available | 2021-09-06T04:38:52Z | - |
| dc.date.created | 2021-06-14 | - |
| dc.date.issued | 2013-02 | - |
| dc.identifier.issn | 0741-3106 | - |
| dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/104033 | - |
| dc.description.abstract | ZnO-based charge-trap Flash technology using a resistive switching mechanism is demonstrated for next-generation nonvolatile memory. This device consists of metal/ZnO/nitride/oxide/silicon in order to make use of the electrical transport in the ZnO resistive switching layer. Compared to the previous devices with perovskite oxide materials used as a conduction path, the proposed device shows faster switching speeds (10 ns/100 mu s), lower operation voltages (+/- 7 V) for the program/erase (P/E) states, and higher endurance (10(6) P/E cycles), along with comparable retention properties. | - |
| dc.language | English | - |
| dc.language.iso | en | - |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
| dc.title | A CMOS-Process-Compatible ZnO-Based Charge-Trap Flash Memory | - |
| dc.type | Article | - |
| dc.contributor.affiliatedAuthor | Kim, Tae Geun | - |
| dc.identifier.doi | 10.1109/LED.2012.2235059 | - |
| dc.identifier.scopusid | 2-s2.0-84873059789 | - |
| dc.identifier.wosid | 000314173200030 | - |
| dc.identifier.bibliographicCitation | IEEE ELECTRON DEVICE LETTERS, v.34, no.2, pp.238 - 240 | - |
| dc.relation.isPartOf | IEEE ELECTRON DEVICE LETTERS | - |
| dc.citation.title | IEEE ELECTRON DEVICE LETTERS | - |
| dc.citation.volume | 34 | - |
| dc.citation.number | 2 | - |
| dc.citation.startPage | 238 | - |
| dc.citation.endPage | 240 | - |
| dc.type.rims | ART | - |
| dc.type.docType | Article | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.subject.keywordAuthor | Charge-trap Flash (CTF) | - |
| dc.subject.keywordAuthor | ReCTF | - |
| dc.subject.keywordAuthor | resistive random-access memory (ReRAM) | - |
| dc.subject.keywordAuthor | silicon/oxide/nitride/oxide/silicon (SONOS) | - |
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Related Researcher
- Kim, Tae geun
- College of Engineering (School of Electrical Engineering)