Multiple silicon nanowire complementary tunnel transistors for ultralow-power flexible logic applications
DC Field | Value | Language |
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dc.contributor.author | Lee, M. | - |
dc.contributor.author | Jeon, Y. | - |
dc.contributor.author | Jung, J-C. | - |
dc.contributor.author | Koo, S-M. | - |
dc.contributor.author | Kim, S. | - |
dc.date.accessioned | 2021-09-06T18:41:00Z | - |
dc.date.available | 2021-09-06T18:41:00Z | - |
dc.date.created | 2021-06-18 | - |
dc.date.issued | 2012-06-18 | - |
dc.identifier.issn | 0003-6951 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/108152 | - |
dc.description.abstract | Based on experimental and simulation studies to gain insight into the suppression of ambipolar conduction in two distinct tunnel field-effect transistor (TFET) devices (that is, an asymmetric source-drain doping or a properly designed gate underlap), here we report on the fabrication and electrical/mechanical characterization of a flexible complementary TFET (c-TFET) inverter on a plastic substrate using multiple silicon nanowires (SiNWs) as the channel material. The static voltage transfer characteristic of the SiNW c-TFET inverter exhibits a full output voltage swing between 0 V and V-dd with a high voltage gain of similar to 29 and a sharp transition of 0.28 V at V-dd = 3V. A leakage power consumption of the SiNW c-TFET inverter in the standby state is as low as 17.1 pW for V-dd = 3V. Moreover, its mechanical bendability indicates that it has good fatigue properties, providing an important step towards the realization of ultralow-power flexible logic circuits. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4729930] | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | AMER INST PHYSICS | - |
dc.subject | FIELD-EFFECT TRANSISTOR | - |
dc.subject | FET | - |
dc.subject | PERFORMANCE | - |
dc.subject | IMPACT | - |
dc.title | Multiple silicon nanowire complementary tunnel transistors for ultralow-power flexible logic applications | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, S. | - |
dc.identifier.doi | 10.1063/1.4729930 | - |
dc.identifier.scopusid | 2-s2.0-84863306748 | - |
dc.identifier.wosid | 000305676400094 | - |
dc.identifier.bibliographicCitation | APPLIED PHYSICS LETTERS, v.100, no.25 | - |
dc.relation.isPartOf | APPLIED PHYSICS LETTERS | - |
dc.citation.title | APPLIED PHYSICS LETTERS | - |
dc.citation.volume | 100 | - |
dc.citation.number | 25 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | FIELD-EFFECT TRANSISTOR | - |
dc.subject.keywordPlus | FET | - |
dc.subject.keywordPlus | PERFORMANCE | - |
dc.subject.keywordPlus | IMPACT | - |
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