Design of an OpenVG Hardware Rendering Engine
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Shen, Yong-Luo | - |
dc.contributor.author | Kim, Seok-Jae | - |
dc.contributor.author | Seo, Sang-Woo | - |
dc.contributor.author | Lee, Hyun-Goo | - |
dc.contributor.author | Oh, Hyeong-Cheol | - |
dc.date.accessioned | 2021-09-07T05:25:48Z | - |
dc.date.available | 2021-09-07T05:25:48Z | - |
dc.date.created | 2021-06-19 | - |
dc.date.issued | 2011-12 | - |
dc.identifier.issn | 1745-1361 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/110967 | - |
dc.description.abstract | This paper introduces a hardware engine for rendering two-dimensional vector graphics based on the OpenVG standard in portable devices. We focus on two design challenges posed by the rendering engines: the number of vertices to represent the images and the amount of memory usage. Redundant vertices are eliminated using adaptive tessellation, in which the redundancy can be judged using a proposed cost-per-quality measure. A simplified edge-flag rendering algorithm and the scanline-based rendering scheme are adopted to reduce external memory access. The designed rendering engine occupies approximately 173K gates and can satisfy real-time requirements of many applications when it is implemented using a 0.18 mu m, 1.8 V CMOS standard cell library. An FPGA prototype using a system-on-a-chip platform has been developed and tested. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG | - |
dc.subject | IMPLEMENTATION | - |
dc.subject | ACCELERATOR | - |
dc.title | Design of an OpenVG Hardware Rendering Engine | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Oh, Hyeong-Cheol | - |
dc.identifier.doi | 10.1587/transinf.E94.D.2409 | - |
dc.identifier.wosid | 000298304900015 | - |
dc.identifier.bibliographicCitation | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, v.E94D, no.12, pp.2409 - 2417 | - |
dc.relation.isPartOf | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS | - |
dc.citation.title | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS | - |
dc.citation.volume | E94D | - |
dc.citation.number | 12 | - |
dc.citation.startPage | 2409 | - |
dc.citation.endPage | 2417 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Software Engineering | - |
dc.subject.keywordPlus | IMPLEMENTATION | - |
dc.subject.keywordPlus | ACCELERATOR | - |
dc.subject.keywordAuthor | OpenVG | - |
dc.subject.keywordAuthor | 2D vector graphics | - |
dc.subject.keywordAuthor | hardware rendering engine | - |
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