Subthreshold Degradation of Gate-all-Around Silicon Nanowire Field-Effect Transistors: Effect of Interface Trap Charge
DC Field | Value | Language |
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dc.contributor.author | Hong, B. H. | - |
dc.contributor.author | Cho, N. | - |
dc.contributor.author | Lee, S. J. | - |
dc.contributor.author | Yu, Y. S. | - |
dc.contributor.author | Choi, L. | - |
dc.contributor.author | Jung, Y. C. | - |
dc.contributor.author | Cho, K. H. | - |
dc.contributor.author | Yeo, K. H. | - |
dc.contributor.author | Kim, D. -W. | - |
dc.contributor.author | Jin, G. Y. | - |
dc.contributor.author | Oh, K. S. | - |
dc.contributor.author | Park, D. | - |
dc.contributor.author | Song, S. -H. | - |
dc.contributor.author | Rieh, J. -S. | - |
dc.contributor.author | Hwang, S. W. | - |
dc.date.accessioned | 2021-09-07T08:39:58Z | - |
dc.date.available | 2021-09-07T08:39:58Z | - |
dc.date.created | 2021-06-19 | - |
dc.date.issued | 2011-09 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/111626 | - |
dc.description.abstract | We measured and analyzed the subthreshold degradation of the gate-all-around (GAA) silicon nanowire field-effect transistors with the length of 300/500 nm and the radius of 5 nm. An analytical model incorporating the effect of interface traps quantitatively explained the measured subthreshold swing (SS) degradation. A simple electrostatic argument showed that the GAA device had smaller degradation of SS values than planar devices for the same interface trap densities. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | THIN-FILM | - |
dc.subject | SIMULATION | - |
dc.subject | MODEL | - |
dc.title | Subthreshold Degradation of Gate-all-Around Silicon Nanowire Field-Effect Transistors: Effect of Interface Trap Charge | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Rieh, J. -S. | - |
dc.contributor.affiliatedAuthor | Hwang, S. W. | - |
dc.identifier.doi | 10.1109/LED.2011.2159473 | - |
dc.identifier.scopusid | 2-s2.0-80052037094 | - |
dc.identifier.wosid | 000294171600005 | - |
dc.identifier.bibliographicCitation | IEEE ELECTRON DEVICE LETTERS, v.32, no.9, pp.1179 - 1181 | - |
dc.relation.isPartOf | IEEE ELECTRON DEVICE LETTERS | - |
dc.citation.title | IEEE ELECTRON DEVICE LETTERS | - |
dc.citation.volume | 32 | - |
dc.citation.number | 9 | - |
dc.citation.startPage | 1179 | - |
dc.citation.endPage | 1181 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | THIN-FILM | - |
dc.subject.keywordPlus | SIMULATION | - |
dc.subject.keywordPlus | MODEL | - |
dc.subject.keywordAuthor | Gate-all-around (GAA) | - |
dc.subject.keywordAuthor | interface trap charge | - |
dc.subject.keywordAuthor | silicon nanowire field-effect transistor (SNWFET) | - |
dc.subject.keywordAuthor | subthreshold degradation | - |
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