8 mW 1.65-Gbps continuous-time equalizer with clock attenuation detection for digital display interface
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Kyu-Young | - |
dc.contributor.author | Lee, Woo-Kwan | - |
dc.contributor.author | Yoo, Jae-Tack | - |
dc.contributor.author | Kim, Soo-Won | - |
dc.date.accessioned | 2021-09-08T03:33:23Z | - |
dc.date.available | 2021-09-08T03:33:23Z | - |
dc.date.created | 2021-06-11 | - |
dc.date.issued | 2010-05 | - |
dc.identifier.issn | 0925-1030 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/116549 | - |
dc.description.abstract | This paper presents a continuous-time equalizer which provides a low-power, small area and low-cost solution for a DDI implementation. Proposed equalizer adopts clock attenuation detector, enabling one to eliminate complex-and-large feed-back loops, and to achieve compact design and low-power consumption. Using the attenuation signal to all four adaptive equalizer filters composed of three signal channels and a clock channel, one curtails three adaptive attenuation detectors in a multi-channel DDI. The design was done in 0.18-mu m CMOS technology. Experimental results summarize that this equalizer can compensate up to -33 dB channel attenuation at 1.65-Gbps DDI rate, showing eye-width of 0.70 UI. Its average power consumption is 8 mW and the effective area is 0.127 mm(2). This power consumption is very low in comparison to those of previous researches and the effective area is very small. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | SPRINGER | - |
dc.subject | ADAPTIVE CABLE EQUALIZER | - |
dc.subject | DATA-TRANSMISSION | - |
dc.subject | CMOS | - |
dc.subject | TRANSCEIVER | - |
dc.title | 8 mW 1.65-Gbps continuous-time equalizer with clock attenuation detection for digital display interface | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Soo-Won | - |
dc.identifier.doi | 10.1007/s10470-009-9405-8 | - |
dc.identifier.scopusid | 2-s2.0-77953363196 | - |
dc.identifier.wosid | 000276252900019 | - |
dc.identifier.bibliographicCitation | ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, v.63, no.2, pp.329 - 337 | - |
dc.relation.isPartOf | ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | - |
dc.citation.title | ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | - |
dc.citation.volume | 63 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 329 | - |
dc.citation.endPage | 337 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | ADAPTIVE CABLE EQUALIZER | - |
dc.subject.keywordPlus | DATA-TRANSMISSION | - |
dc.subject.keywordPlus | CMOS | - |
dc.subject.keywordPlus | TRANSCEIVER | - |
dc.subject.keywordAuthor | Continuous-time equalizer | - |
dc.subject.keywordAuthor | Equalizer filter | - |
dc.subject.keywordAuthor | Attenuation detection | - |
dc.subject.keywordAuthor | Digital display interface | - |
dc.subject.keywordAuthor | D flip-flop | - |
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