Silicon nanodot arrays patterned using diblock copolymer templates
- Authors
- Kang, Gil Bum; Kim, Seong-Il; Kim, Young Hwan; Kim, Yong Tae; Park, Jung Ho
- Issue Date
- 10월-2009
- Publisher
- SPRINGER
- Keywords
- Diblock copolymer; Copolymer lithography; Reactive ion etching; Si nano dot; Nanotemplate
- Citation
- JOURNAL OF ELECTROCERAMICS, v.23, no.2-4, pp.524 - 529
- Indexed
- SCIE
SCOPUS
- Journal Title
- JOURNAL OF ELECTROCERAMICS
- Volume
- 23
- Number
- 2-4
- Start Page
- 524
- End Page
- 529
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/119213
- DOI
- 10.1007/s10832-008-9527-x
- ISSN
- 1385-3449
- Abstract
- Dense and periodic arrays of holes and Si nano dots were fabricated on silicon substrate. The holes were approximately 20-40 nm wide, 40 nm deep and 40-80 nm apart. To obtain nano-size patterns, self-assembling resists were used to produce layer of hexagonally ordered parallel cylinders of polymethylmethacrylate (PMMA) in polystyrene (PS) matrix. The PMMA cylinders were degraded and removed with acetic acid rinse to produce a PS. 10 nm-thick Au thin film was deposited by using electron beam evaporator. PS template was removed by lift-off process. Arrays of Au nano dot were transferred by using fluorine-based reactive ion etching. Au nano dots were removed by sulfuric acid. Si nano dots size and height were 24-70 nm and 20-30 nm respectively. Sequential oxidation-wet etching method reduced size of Si nano dots. Reduced sized silicon nano dots diameter and height were 18 nm and 12 nm, respectively. Nanopatterned holes sizes were observed by field emission scanning electron microscope (FESEM) and atomic force microscopy.
- Files in This Item
- There are no files associated with this item.
- Appears in
Collections - College of Engineering > School of Electrical Engineering > 1. Journal Articles
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.