Adopting the drowsy technique for instruction caches: A soft error perspective
- Authors
- Shin, Soong Hyun; Chung, Sung Woo; Chung, Eui-Young; Jhon, Chu Shik
- Issue Date
- 7월-2008
- Publisher
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
- Keywords
- instruction cache; soft error; drowsy technique; low-power
- Citation
- IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E91A, no.7, pp.1772 - 1779
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES
- Volume
- E91A
- Number
- 7
- Start Page
- 1772
- End Page
- 1779
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/123311
- DOI
- 10.1093/ietfec/e91-a.7.1772
- ISSN
- 0916-8508
- Abstract
- As technology scales down, leakage energy accounts for a greater proportion of total energy. Applying the drowsy technique to a cache, is regarded as one of the most efficient techniques for reducing leakage energy. However, it increases the Soft Error Rate (SER), thus, many researchers doubt the reliability of the drowsy technique. In this paper, we show several reasons why the instruction cache can adopt the drowsy technique without reliability problems. First, an instruction cache always stores read-only data, leading to soft error recovery by re-fetching the instructions from lower level memory. Second, the effect of the re-fetching caused by soft errors on performance is negligible. Additionally, a considerable percentage of soft errors can occur without harming the performance. Lastly, unrecoverable soft errors can be controlled by the scrubbing method. The simulation results show that the drowsy instruction cache rarely increases the rate of unrecoverable errors and negligibly degrades the performance.
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