Electrical characteristics of Si-nanoparticle/Si-nanowire-based field-effect transistors
DC Field | Value | Language |
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dc.contributor.author | Kang, Jeongmin | - |
dc.contributor.author | Keem, Kihyun | - |
dc.contributor.author | Jeong, Dong-Young | - |
dc.contributor.author | Park, Miyoung | - |
dc.contributor.author | Whang, Dongmok | - |
dc.contributor.author | Kim, Sangsig | - |
dc.date.accessioned | 2021-09-09T08:59:45Z | - |
dc.date.available | 2021-09-09T08:59:45Z | - |
dc.date.created | 2021-06-10 | - |
dc.date.issued | 2008-05 | - |
dc.identifier.issn | 0022-2461 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/123679 | - |
dc.description.abstract | In this study, Si-nanoparticle(NP)/Si-nanowire(NW)-based field-effect transistors (FETs) with a top-gate geometry were fabricated and characterized. In these FETs, Si NPs were embedded as localized trap sites in Al2O3 top-gate layers coated on Si NW channels. Drain current versus drain voltage (I-DS-V-DS) and drain current versus gate voltage (I-DS-V-GS) were measured for the Si NP/Si NW-based FETs to investigate their electrical and memory characteristics. The Si NW channels were depleted at V-GS = 9 V, indicating that the devices functioned as p-type depletion-mode FETs. The top-gate Si NW-based FETs decorated with Si NPs show counterclockwise hysteresis loops in the I-DS-V-GS curves, revealing their significant charge storage effect. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | SPRINGER | - |
dc.subject | SILICON NANOWIRES | - |
dc.subject | BUILDING-BLOCKS | - |
dc.subject | LOGIC GATES | - |
dc.subject | MEMORY | - |
dc.title | Electrical characteristics of Si-nanoparticle/Si-nanowire-based field-effect transistors | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Sangsig | - |
dc.identifier.doi | 10.1007/s10853-007-2310-6 | - |
dc.identifier.wosid | 000254964200011 | - |
dc.identifier.bibliographicCitation | JOURNAL OF MATERIALS SCIENCE, v.43, no.10, pp.3424 - 3428 | - |
dc.relation.isPartOf | JOURNAL OF MATERIALS SCIENCE | - |
dc.citation.title | JOURNAL OF MATERIALS SCIENCE | - |
dc.citation.volume | 43 | - |
dc.citation.number | 10 | - |
dc.citation.startPage | 3424 | - |
dc.citation.endPage | 3428 | - |
dc.type.rims | ART | - |
dc.type.docType | Article; Proceedings Paper | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.subject.keywordPlus | SILICON NANOWIRES | - |
dc.subject.keywordPlus | BUILDING-BLOCKS | - |
dc.subject.keywordPlus | LOGIC GATES | - |
dc.subject.keywordPlus | MEMORY | - |
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