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A fingerprint matching hardware for smart cards

Authors
Pan, Sung BumMoon, DaesungKim, KichulChung, Yongwha
Issue Date
25-2월-2008
Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Keywords
biometrics; fingerprint verification; smart card; Match-on-Card; FPGA; hardware
Citation
IEICE ELECTRONICS EXPRESS, v.5, no.4, pp.136 - 144
Indexed
SCIE
SCOPUS
Journal Title
IEICE ELECTRONICS EXPRESS
Volume
5
Number
4
Start Page
136
End Page
144
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/124062
DOI
10.1587/elex.5.136
ISSN
1349-2543
Abstract
Using biometrics to authenticate a person's identity has several advantages over the present practices of Personal Identification Numbers or passwords. To gain maximum security in the authentication system using biometrics, the computation of the authentication as well as the store of the biometric template has to take place in a smart card. However, it is challenging to integrate biometrics into a smart card because of limited resources such as processing power and memory space. In this paper, we propose an area-time-accuracy efficient hardware design for a fingerprint matching system, which can be integrated into smart card chips. Experimental results show that the match operation can be completed in real time (190 ms) on the proposed hardware requiring 36K gates (2.4mm(2) silicon area by using 0.25 mu m CMOS technology). Also, an Equal Error Rate (EER) of 3.8% can be obtained by using the proposed hardware solution. For the same operation, a previous software solution with a memory-efficient data structure could be executed only on a state-of-the-art, high-cost smart card and provide an EER of 6.0%.
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