A 15 Gb/s Non-Return-to-Zero Transmitter With 1-Tap Pre-Emphasis Feed-Forward Equalizer for Low-Power Ground Terminated Memory Interfaces
- Authors
- Kwon, Youngwook; Park, Hyunsu; Choi, Yoonjae; Sim, Jincheol; Choi, Jonghyuck; Park, Seungwoo; Kim, Chulwoo
- Issue Date
- 6월-2022
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- Voltage; Charge pumps; Capacitors; Transmitters; Impedance; Clocks; MOS devices; Asymmetric interface; CMOS; dynamic random-access memory (DRAM); equalization; transmitter
- Citation
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.69, no.6, pp.2737 - 2741
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
- Volume
- 69
- Number
- 6
- Start Page
- 2737
- End Page
- 2741
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/143009
- DOI
- 10.1109/TCSII.2022.3159769
- ISSN
- 1549-7747
- Abstract
- This brief presents a 1-tap pre-emphasis transmitter (TX) for a single-ended ground-terminated memory interface with 28 nm complementary metal-oxide-semiconductor (CMOS) technology. By employing a charge pump scheme, a voltage level below ground was used to remove inter-symbol interference (ISI). Encoded with the unit interval (UI) delayed data, the proposed equalization technique increases the vertical voltage margin for the receiver (RX) compared to conventional feed-forward equalization (FFE). In addition, the short current after equalization was removed, and impedance matching for reflection was facilitated. The data rate of the proposed work is 15 Gb/s, and the data path power dissipation for the entire design is 20.3 mW. The measured energy efficiency is 1.35 pJ/bit, and the total area occupation is 0.008 mm(2).
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Collections - College of Engineering > School of Electrical Engineering > 1. Journal Articles
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