A 4.5 Gb/s/pin transceiver with hybrid inter-symbol interference and far-end crosstalk equalization for next-generation high-bandwidth memory interface
DC Field | Value | Language |
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dc.contributor.author | Yoon, Kungryun | - |
dc.contributor.author | Park, Hyunsu | - |
dc.contributor.author | Choi, Yoonjae | - |
dc.contributor.author | Sim, Jincheol | - |
dc.contributor.author | Choi, Jonghyuck | - |
dc.contributor.author | Kim, Chulwoo | - |
dc.date.accessioned | 2022-08-13T22:40:30Z | - |
dc.date.available | 2022-08-13T22:40:30Z | - |
dc.date.created | 2022-08-12 | - |
dc.date.issued | 2022-05 | - |
dc.identifier.issn | 0013-5194 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/143080 | - |
dc.description.abstract | A 4.5 Gb/s/pin transceiver capable of eliminating the inter-symbol interference (ISI) and far-end crosstalk (FEXT) in a hybrid scheme with low power and small area for next-generation high-bandwidth memory (HBM) interfaces is presented. Built around the combination of two ISI and FEXT equalization topologies, the transmitter (TX) energy efficiently reduces data-dependent jitter (DDJ) and crosstalk-induced jitter (CIJ) by using the compensation signal generated from edge detectors (ED) to ensure the sampling margin. The prototype transceiver, implemented using a 28-nm complementary metal-oxide semiconductor (CMOS) process, operates over a 3-mm mimicked silicon interposer channel with 21.2-dB loss. It achieves a data rate per density of 9 Gb/s/mu m at a bit error rate (BER) < 10(-12) with 0.23 unit interval (UI) eye width for pseudorandom binary sequence (PRBS)15 data while consuming only 1.46 pJ/bit. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | WILEY | - |
dc.title | A 4.5 Gb/s/pin transceiver with hybrid inter-symbol interference and far-end crosstalk equalization for next-generation high-bandwidth memory interface | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Chulwoo | - |
dc.identifier.doi | 10.1049/ell2.12494 | - |
dc.identifier.scopusid | 2-s2.0-85129071562 | - |
dc.identifier.wosid | 000789579000001 | - |
dc.identifier.bibliographicCitation | ELECTRONICS LETTERS, v.58, no.11, pp.420 - 422 | - |
dc.relation.isPartOf | ELECTRONICS LETTERS | - |
dc.citation.title | ELECTRONICS LETTERS | - |
dc.citation.volume | 58 | - |
dc.citation.number | 11 | - |
dc.citation.startPage | 420 | - |
dc.citation.endPage | 422 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | Y | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
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