Logic and memory functions of an inverter comprising reconfigurable double gated feedback field effect transistorsopen access
- Authors
- Jeon, Juhee; Woo, Sola; Cho, Kyoungah; Kim, Sangsig
- Issue Date
- 22-7월-2022
- Publisher
- NATURE PORTFOLIO
- Citation
- SCIENTIFIC REPORTS, v.12, no.1
- Indexed
- SCIE
SCOPUS
- Journal Title
- SCIENTIFIC REPORTS
- Volume
- 12
- Number
- 1
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/143351
- DOI
- 10.1038/s41598-022-16796-x
- ISSN
- 2045-2322
- Abstract
- In this study, we propose an inverter consisting of reconfigurable double-gated (DG) feedback field-effect transistors (FBFETs) and examine its logic and memory operations through a mixed-mode technology computer-aided design simulation. The DG FBFETs can be reconfigured to n- or p-channel modes, and these modes exhibit an on/off current ratio of similar to 10(12) and a subthreshold swing (SS) of similar to 0.4 mV/dec. Our study suggests the solution to the output voltage loss, a common problem in FBFET-based inverters; the proposed inverter exhibits the same output logic voltage as the supply voltage in gigahertz frequencies by applying a reset operation between the logic operations. The inverter retains the output logic '1' and '0' states for similar to 21 s without the supply voltage. The proposed inverter demonstrates the promising potential for logic-in-memory application.
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