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Compact 232-250-GHz Traveling-Wave Frequency Doubler With Peak Output Power of 5.2 dBm and Efficiency of 2.9%

Authors
Yeom, KyeonghoKim, DongkyoJeon, Sanggeun
Issue Date
9월-2022
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Power generation; Transmission line measurements; Topology; Power system harmonics; Layout; Harmonic analysis; Frequency conversion; Frequency doubler; high-power terahertz source; InP double heterodyne bipolar transistor (DHBT); traveling wave; WR-3; 4 band
Citation
IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.32, no.9, pp.1055 - 1058
Indexed
SCIE
SCOPUS
Journal Title
IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS
Volume
32
Number
9
Start Page
1055
End Page
1058
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/146600
DOI
10.1109/LMWC.2022.3165615
ISSN
1531-1309
Abstract
A 232-250-GHz traveling-wave frequency doubler is presented using a 250-nm InP double heterodyne bipolar transistor (DHBT) technology. Compared to the previous traveling-wave structures, the proposed frequency doubler employs physical open at the end of the input feed line, thus minimizing the input signal leakage and avoiding the crossover of the output signal line. In addition, the output power is maximized by load-pull matching at the 2nd harmonic while the fundamental suppression is enhanced by phase compensation of the differential signal. The frequency doubler exhibits peak output power of 5.2 dBm at 240 GHz with a conversion gain of -4.3 dB and overall efficiency of 2.9%. The 3-dB bandwidth for output power is from 232 to 250 GHz. The fundamental suppression is 25 to 33 dB over the bandwidth. The chip size is as small as 443 x 536 mu m(2) owing to the traveling-wave structure requiring no balun.
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공과대학 (전기전자공학부)
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