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A 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DAC
Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Hyung-Min | - |
| dc.date.accessioned | 2021-08-28T01:43:07Z | - |
| dc.date.available | 2021-08-28T01:43:07Z | - |
| dc.date.created | 2021-04-22 | - |
| dc.date.issued | 2018-02-13 | - |
| dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/20258 | - |
| dc.publisher | IEEE | - |
| dc.title | A 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DAC | - |
| dc.title.alternative | A 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DAC | - |
| dc.type | Conference | - |
| dc.contributor.affiliatedAuthor | Lee, Hyung-Min | - |
| dc.identifier.bibliographicCitation | IEEE Int. Solid-State Circuits Conf. (ISSCC) | - |
| dc.relation.isPartOf | IEEE Int. Solid-State Circuits Conf. (ISSCC) | - |
| dc.relation.isPartOf | Proceedings of the IEEE Int. Solid-State Circuits Conf. (ISSCC) | - |
| dc.citation.title | IEEE Int. Solid-State Circuits Conf. (ISSCC) | - |
| dc.citation.conferencePlace | US | - |
| dc.citation.conferencePlace | San Francisco, CA, USA | - |
| dc.citation.conferenceDate | 2018-02-11 | - |
| dc.type.rims | CONF | - |
| dc.description.journalClass | 1 | - |
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