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A 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DACA 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DAC

Alternative Title
A 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DAC
Authors
Lee, Hyung-Min
Issue Date
13-2월-2018
Publisher
IEEE
Citation
IEEE Int. Solid-State Circuits Conf. (ISSCC)
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/20258
Conference Name
IEEE Int. Solid-State Circuits Conf. (ISSCC)
Place
US
San Francisco, CA, USA
Conference Date
2018-02-11
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College of Engineering > School of Electrical Engineering > 2. Conference Papers

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공과대학 (전기전자공학부)
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