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A 1.35V-5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty cycle correctorA 1.35V-5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty cycle corrector
- Alternative Title
- A 1.35V-5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty cycle corrector
- Authors
- KIM, Chulwoo
- Issue Date
- 13-2월-2013
- Publisher
- IEEE
- Citation
- IEEE International Solid-State Circuits Conference
- Conference Name
- IEEE International Solid-State Circuits Conference
- Place
- US
- Conference Date
- 2014-02-09
- Files in This Item
- There are no files associated with this item.
- Appears in
Collections - College of Engineering > School of Electrical Engineering > 2. Conference Papers
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