LER-Induced Random Variation-Immune Effect of Metal-Interlayer-Semiconductor Source/Drain Structure on N-Type Ge Junction less FinFETs

Abstract

Herein, the line-edge roughness (LER)-induced random performance variation-immune effect of metal-interlayer-semiconductor (MIS) source/drain (S/D) in 7 nm n-type Ge (n-Ge) junctionless field-effect transistors (JLFETs) were investigated by 3-D TCAD simulations. Compared to the device without MIS S/D, the n-Ge JLFET with MIS S/D could effectively reduce the Ge fin doping concentration while maintaining the performance. It was demonstrated analytically that the reduced Ge fin doping concentration of the device with MIS S/D, compared to the device without MIS S/D, decreased the LER-induced random performance variations of the n-Ge JLFET; the standard deviations were reduced to similar to 0.0318 V for Vth (reduced by similar to 51.6%), 4.89 x 10(-6) A/mu m for I-on (reduced by similar to 92.1%), 1.44 x 10(-9) A/mu m for I-off (reduced by similar to 93.7%), 1.27 mV/dec for SS (reduced by similar to 23.1%), and similar to 5.40 mVN for drain-induced barrier lowering (DIBL) (reduced by similar to 30.8%). In addition, LER-induced random performance variation was investigated in terms of scaling down fin widths. The results provided critical insight into the variability reduction of the 7 nm n-Ge JLFETs.