Variation of poly-Si grain structures under thermal annealing and its effect on the performance of TiN/Al2O3/Si3N4/SiO2/poly-Si capacitors
DC Field | Value | Language |
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dc.contributor.author | Hong, Suk Bum | - |
dc.contributor.author | Park, Ju Hyun | - |
dc.contributor.author | Lee, Tae Ho | - |
dc.contributor.author | Lim, Jun Hee | - |
dc.contributor.author | Shin, Changhwan | - |
dc.contributor.author | Park, Young Woo | - |
dc.contributor.author | Kim, Tae Geun | - |
dc.date.accessioned | 2021-09-01T14:46:56Z | - |
dc.date.available | 2021-09-01T14:46:56Z | - |
dc.date.created | 2021-06-18 | - |
dc.date.issued | 2019-05-31 | - |
dc.identifier.issn | 0169-4332 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/65355 | - |
dc.description.abstract | This study presents the improved memory properties of TiN/Al2O3/Si3N4/SiO2/poly-Si (TANOS) capacitors after rapid thermal annealing (RTA) and high-pressure annealing processes (HPAP) using H-2 and D-2 molecules. First, it was confirmed that the recrystallization rate, and thus the grain size of the poly-silicon (poly-Si) film, increased with an increase of the RTA temperature, eventually improving the performance of the TANOS capacitor by reducing the trap densities at the poly-Si/SiO2 interface. Then, it was found that device performance parameters, such as program/erase speed and data retention, could be further improved through HPAP owing to the passivation of band gap states at the poly-Si channel grain boundary. Finally, it was confirmed that these improvements can be observed at a transistor level in the same fashion using the Silvaco TCAD simulation. (C) 2017 Elsevier B.V. All rights reserved. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | ELSEVIER SCIENCE BV | - |
dc.subject | ELECTRICAL-PROPERTIES | - |
dc.subject | POLYSILICON | - |
dc.subject | TRANSPORT | - |
dc.subject | MOBILITY | - |
dc.title | Variation of poly-Si grain structures under thermal annealing and its effect on the performance of TiN/Al2O3/Si3N4/SiO2/poly-Si capacitors | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Tae Geun | - |
dc.identifier.doi | 10.1016/j.apsusc.2017.11.226 | - |
dc.identifier.scopusid | 2-s2.0-85036529770 | - |
dc.identifier.wosid | 000462024600016 | - |
dc.identifier.bibliographicCitation | APPLIED SURFACE SCIENCE, v.477, pp.104 - 110 | - |
dc.relation.isPartOf | APPLIED SURFACE SCIENCE | - |
dc.citation.title | APPLIED SURFACE SCIENCE | - |
dc.citation.volume | 477 | - |
dc.citation.startPage | 104 | - |
dc.citation.endPage | 110 | - |
dc.type.rims | ART | - |
dc.type.docType | Article; Proceedings Paper | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Chemistry | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Chemistry, Physical | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Coatings & Films | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
dc.subject.keywordPlus | ELECTRICAL-PROPERTIES | - |
dc.subject.keywordPlus | POLYSILICON | - |
dc.subject.keywordPlus | TRANSPORT | - |
dc.subject.keywordPlus | MOBILITY | - |
dc.subject.keywordAuthor | Poly-silicon channel | - |
dc.subject.keywordAuthor | Interface trap | - |
dc.subject.keywordAuthor | Grain boundary | - |
dc.subject.keywordAuthor | TANOS | - |
dc.subject.keywordAuthor | Rapid thermal annealing | - |
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