Static Random Access Memory Characteristics of Single-Gated Feedback Field-Effect Transistors
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cho, Jinsun | - |
dc.contributor.author | Lim, Doohyeok | - |
dc.contributor.author | Woo, Sola | - |
dc.contributor.author | Cho, Kyungah | - |
dc.contributor.author | Kim, Sangsig | - |
dc.date.accessioned | 2021-09-01T21:56:45Z | - |
dc.date.available | 2021-09-01T21:56:45Z | - |
dc.date.created | 2021-06-19 | - |
dc.date.issued | 2019-01 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/68464 | - |
dc.description.abstract | In this paper, we propose a novel static random access memory (SRAM) unit cell design and its array structure consisting of single-gated feedback field-effect transistors (FBFETs). To verify the SRAM characteristics, the basic memory operations and write disturbances of the unit cell are investigated through the mixed-mode technology computer-aided design simulations. The unit cell exhibits the superior SRAM characteristics including a write speed of 0.6 ns, a fast read-out speed of similar to 0.1 ns, and a retention time of 3600 s. Furthermore, the unit cell design exhibits advantages in density, with a small cell area of 8F(2), and in the power consumption; the standby power consumption is 0.24 nW/bit for holding "1" and negligible for holding "0." Moreover, our SRAM array shows reliable 3 x 3 array operations without any disturbances. This paper demonstrates the promising potential of the FBFET SRAM for high-performance, high-density, and low-power memory applications. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | LOW-POWER | - |
dc.title | Static Random Access Memory Characteristics of Single-Gated Feedback Field-Effect Transistors | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Cho, Kyungah | - |
dc.contributor.affiliatedAuthor | Kim, Sangsig | - |
dc.identifier.doi | 10.1109/TED.2018.2881965 | - |
dc.identifier.scopusid | 2-s2.0-85058073320 | - |
dc.identifier.wosid | 000454333500054 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON ELECTRON DEVICES, v.66, no.1, pp.413 - 419 | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.citation.title | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.citation.volume | 66 | - |
dc.citation.number | 1 | - |
dc.citation.startPage | 413 | - |
dc.citation.endPage | 419 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | LOW-POWER | - |
dc.subject.keywordAuthor | Feedback field-effect transistors (FBFETs) | - |
dc.subject.keywordAuthor | positive feedback loop | - |
dc.subject.keywordAuthor | static random access memory (SRAM) | - |
dc.subject.keywordAuthor | transient simulation | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
145 Anam-ro, Seongbuk-gu, Seoul, 02841, Korea+82-2-3290-2963
COPYRIGHT © 2021 Korea University. All Rights Reserved.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.