A D-Band Multiplier-Based OOK Transceiver With Supplementary Transistor Modeling in 65-nm Bulk CMOS Technology
- Authors
- Suh, Bohee; Lee, Hyunkyu; Kim, Sooyeon; Jeon, Sanggeun
- Issue Date
- 2019
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- D-band; low-cost bulk CMOS; OOK; transceiver; transistor modeling; wireless communication
- Citation
- IEEE ACCESS, v.7, pp.7783 - 7793
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE ACCESS
- Volume
- 7
- Start Page
- 7783
- End Page
- 7793
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/68905
- DOI
- 10.1109/ACCESS.2018.2889165
- ISSN
- 2169-3536
- Abstract
- A D-band on-off keying (OOK) transceiver chipset is fabricated in a 65-nm bulk CMOS technology as a low-cost and highly integrative solution to short-distance wireless connectivity. Supplementary transistor modeling is performed for accurate circuit design at mm-wave frequencies. To overcome low transistor f(max) and reduce dc power consumption, the transmitter employs a frequency-multiplier-based architecture with no power amplifier. The receiver adopts a non-coherent architecture consisting of a dc-coupled three-stage differential amplifier and an envelope detector. The OOK transmitter exhibits a measured output power of -9.8 dBm and an on-off level difference of 13.2 dB at 134.1 GHz. The receiver shows a measured average responsivity of 4.1 kV/W and a noise equivalent power of 211.4 pW/Hz(1/2) over all D-band frequencies. The dc power consumption of the transmitter and the receiver is 76 and 32.5 mW, respectively. The transceiver is tested in both on-chip loopback and air-channel configurations and demonstrates data transmission up to 10 and 2 Gb/s at a distance of 0.03 m, respectively.
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