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Epsim: A Scalable and Parallel Marssx86 Simulator With Exploiting Epoch-Based Execution

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dc.contributor.authorKim, Minseong-
dc.contributor.authorPark, Chanhyun-
dc.contributor.authorHan, Miseon-
dc.contributor.authorHan, Youngsun-
dc.contributor.authorKim, Seon Wook-
dc.date.accessioned2021-09-01T22:49:10Z-
dc.date.available2021-09-01T22:49:10Z-
dc.date.created2021-06-19-
dc.date.issued2019-
dc.identifier.issn2169-3536-
dc.identifier.urihttps://scholar.korea.ac.kr/handle/2021.sw.korea/68965-
dc.description.abstractIn general, a detailed modeling and evaluation of computer architectures make a cycle-accurate simulator necessary. As the architectures become increasingly complex for parallel, cloud, and neural computing, nowadays, the complexity of the simulator grows rapidly, and thus its execution is too slow or infeasible for practical use. In order to alleviate the problem, many previous studies have focused on reducing the simulation time in a variety of ways such as using sampling methods, adding hardware accelerators, and so on. In this paper, we propose a new parallel simulation framework, called Epoch-based Parallel SIMulator, to obtain scalable speedup with large number of cores. The framework is based on a well-known cycle-accurate full-system simulator, MARSSx86. From the simulator, we build an epoch, that is an execution interval, where the architectural simulation by PTLSim does not involve any interaction with QEMU. Therefore, we can simulate epochs independently, i.e., execute multiple epochs completely in parallel by PTLSim with their live-in data. Our performance evaluation shows that we achieve 12.8x speed on average with 16-core parallel simulation from the SPEC CPU2006 benchmarks and the PARSEC benchmarks, providing the performance scalability.-
dc.languageEnglish-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectSYSTEM-
dc.titleEpsim: A Scalable and Parallel Marssx86 Simulator With Exploiting Epoch-Based Execution-
dc.typeArticle-
dc.contributor.affiliatedAuthorKim, Seon Wook-
dc.identifier.doi10.1109/ACCESS.2018.2886630-
dc.identifier.scopusid2-s2.0-85058873432-
dc.identifier.wosid000456498900001-
dc.identifier.bibliographicCitationIEEE ACCESS, v.7, pp.4782 - 4794-
dc.relation.isPartOfIEEE ACCESS-
dc.citation.titleIEEE ACCESS-
dc.citation.volume7-
dc.citation.startPage4782-
dc.citation.endPage4794-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaTelecommunications-
dc.relation.journalWebOfScienceCategoryComputer Science, Information Systems-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryTelecommunications-
dc.subject.keywordPlusSYSTEM-
dc.subject.keywordAuthorArchitectural simulation-
dc.subject.keywordAuthorepoch-based execution-
dc.subject.keywordAuthorparallel simulation-
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