Detailed Information

Cited 0 time in webofscience Cited 0 time in scopus
Metadata Downloads

Recent Advances in FPGA Reverse Engineering

Authors
Yu, HoyoungLee, HansolLee, SangilKim, YoungminLee, Hyung-Min
Issue Date
10월-2018
Publisher
MDPI
Keywords
reverse engineering; FPGA; hardware security; bitstream; netlists; Xilinx
Citation
ELECTRONICS, v.7, no.10
Indexed
SCIE
SCOPUS
Journal Title
ELECTRONICS
Volume
7
Number
10
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/72572
DOI
10.3390/electronics7100246
ISSN
2079-9292
Abstract
In this paper, we review recent advances in reverse engineering with an emphasis on FPGA devices and experimentally verified advantages and limitations of reverse engineering tools. The paper first introduces essential components for programming Xilinx FPGAs (Xilinx, San Jose, CA, USA), such as Xilinx Design Language (XDL), XDL Report (XDLRC), and bitstream. Then, reverse engineering tools (Debit, BIL, and Bit2ncd), which extract the bitstream from the external memory to the FPGA and utilize it to recover the netlist, are reviewed, and their limitations are discussed. This paper also covers supplementary tools (Rapidsmith) that can adjust the FPGA design flow to support reverse engineering. Finally, reverse engineering projects for non-Xilinx products, such as Lattice FPGAs (Icestorm) and Altera FPGAs (QUIP), are introduced to compare the reverse engineering capabilities by various commercial FPGA products.
Files in This Item
There are no files associated with this item.
Appears in
Collections
College of Engineering > School of Electrical Engineering > 1. Journal Articles

qrcode

Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.

Related Researcher

Researcher Lee, Hyung Min photo

Lee, Hyung Min
공과대학 (전기전자공학부)
Read more

Altmetrics

Total Views & Downloads

BROWSE