Silicon nanowire CMOS NOR logic gates featuring one-volt operation on bendable substrates
DC Field | Value | Language |
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dc.contributor.author | Moon, Jeongje | - |
dc.contributor.author | Kim, Yoonjoong | - |
dc.contributor.author | Lim, Doohyeok | - |
dc.contributor.author | Kim, Sangsig | - |
dc.date.accessioned | 2021-09-02T12:30:06Z | - |
dc.date.available | 2021-09-02T12:30:06Z | - |
dc.date.created | 2021-06-16 | - |
dc.date.issued | 2018-05 | - |
dc.identifier.issn | 1998-0124 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/76046 | - |
dc.description.abstract | In this study, we propose complementary metal-oxide-semiconductor (CMOS) NOR logic gates consisting of silicon nanowire (NW) arrays on bendable substrates. A circuit consisting of two p-channel NW field-effect transistors (NWFETs) in series and two n-channel NWFETs in parallel is constructed to operate a two-input CMOS NOR logic gate. The NOR logic gates operate at a low supply voltage of 1 V with a rail-to-rail logic swing and a high voltage gain of approximately -3.0. The exact NOR logic functionality is achieved owing to the superior electrical characteristics of the well-aligned p- and n-NWFETs, which are obtained using conventional Si-based CMOS technology. Moreover, the NOR logic gates exhibit stable characteristics and have good mechanical properties. The proposed bendable NW CMOS NOR logic gates are promising building blocks for future bendable integrated electronics. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | TSINGHUA UNIV PRESS | - |
dc.subject | FIELD-EFFECT TRANSISTORS | - |
dc.subject | ZNO-NANOWIRE | - |
dc.subject | CIRCUITS | - |
dc.subject | DEVICES | - |
dc.subject | ELECTRONICS | - |
dc.subject | DESIGN | - |
dc.subject | ARRAYS | - |
dc.subject | SCALE | - |
dc.title | Silicon nanowire CMOS NOR logic gates featuring one-volt operation on bendable substrates | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Sangsig | - |
dc.identifier.doi | 10.1007/s12274-017-1889-4 | - |
dc.identifier.scopusid | 2-s2.0-85033385654 | - |
dc.identifier.wosid | 000431999700028 | - |
dc.identifier.bibliographicCitation | NANO RESEARCH, v.11, no.5, pp.2625 - 2631 | - |
dc.relation.isPartOf | NANO RESEARCH | - |
dc.citation.title | NANO RESEARCH | - |
dc.citation.volume | 11 | - |
dc.citation.number | 5 | - |
dc.citation.startPage | 2625 | - |
dc.citation.endPage | 2631 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Chemistry | - |
dc.relation.journalResearchArea | Science & Technology - Other Topics | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Chemistry, Physical | - |
dc.relation.journalWebOfScienceCategory | Nanoscience & Nanotechnology | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | FIELD-EFFECT TRANSISTORS | - |
dc.subject.keywordPlus | ZNO-NANOWIRE | - |
dc.subject.keywordPlus | CIRCUITS | - |
dc.subject.keywordPlus | DEVICES | - |
dc.subject.keywordPlus | ELECTRONICS | - |
dc.subject.keywordPlus | DESIGN | - |
dc.subject.keywordPlus | ARRAYS | - |
dc.subject.keywordPlus | SCALE | - |
dc.subject.keywordAuthor | field-effect transistor | - |
dc.subject.keywordAuthor | silicon nanowire | - |
dc.subject.keywordAuthor | NOR logic gate | - |
dc.subject.keywordAuthor | bendable substrate | - |
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