Nondestructive Readout Memory Characteristics of Silicon Nanowire Biristors
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lim, Doohyeok | - |
dc.contributor.author | Kim, Minsuk | - |
dc.contributor.author | Kim, Yoonjoong | - |
dc.contributor.author | Cho, Jinsun | - |
dc.contributor.author | Kim, Sangsig | - |
dc.date.accessioned | 2021-09-02T12:56:25Z | - |
dc.date.available | 2021-09-02T12:56:25Z | - |
dc.date.created | 2021-06-16 | - |
dc.date.issued | 2018-04 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/76269 | - |
dc.description.abstract | In this paper, we demonstrate nondestructive readout memory characteristics of a bistable resistor (biristor) with an n(+)-p-n(+) Si nanowire (SiNW) channel on a bendable substrate. The SiNW channel is fabricated using a top-down route, which is compatible with the current complementary metal-oxide-semiconductor technology. The SiNW biristor shows the outstanding memory characteristics such as a retention time of 10 s and a current sensing margin of similar to 23-mu A at room temperature. These memory characteristics originate from a positive feedback process resulting from impact ionization near the p-n junction. Moreover, the positive feedback mechanism is comprehensively investigated using device simulation. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | SOI MOSFETS | - |
dc.subject | BIPOLAR-TRANSISTORS | - |
dc.subject | BISTABLE RESISTOR | - |
dc.subject | 1T-DRAM | - |
dc.subject | OPERATION | - |
dc.subject | BREAKDOWN | - |
dc.subject | CELL | - |
dc.title | Nondestructive Readout Memory Characteristics of Silicon Nanowire Biristors | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Sangsig | - |
dc.identifier.doi | 10.1109/TED.2018.2802492 | - |
dc.identifier.scopusid | 2-s2.0-85042860783 | - |
dc.identifier.wosid | 000427856300046 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON ELECTRON DEVICES, v.65, no.4, pp.1578 - 1582 | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.citation.title | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.citation.volume | 65 | - |
dc.citation.number | 4 | - |
dc.citation.startPage | 1578 | - |
dc.citation.endPage | 1582 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | SOI MOSFETS | - |
dc.subject.keywordPlus | BIPOLAR-TRANSISTORS | - |
dc.subject.keywordPlus | BISTABLE RESISTOR | - |
dc.subject.keywordPlus | 1T-DRAM | - |
dc.subject.keywordPlus | OPERATION | - |
dc.subject.keywordPlus | BREAKDOWN | - |
dc.subject.keywordPlus | CELL | - |
dc.subject.keywordAuthor | Bistable resistor (biristor) | - |
dc.subject.keywordAuthor | capacitor-less | - |
dc.subject.keywordAuthor | one-transistor dynamic random access memory (1T-DRAM) | - |
dc.subject.keywordAuthor | positive feedback | - |
dc.subject.keywordAuthor | silicon nanowire (SiNW) | - |
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