Analysis of Deep and Shallow Traps in Semi-Insulating CdZnTe
- Authors
- Kim, Kihyun; Yoon, Yongsu; James, Ralph B.
- Issue Date
- 2월-2018
- Publisher
- KOREAN PHYSICAL SOC
- Keywords
- CdZnTe; Trap level; MIS devices; Capacitance measurement
- Citation
- JOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.72, no.4, pp.508 - 514
- Indexed
- SCIE
SCOPUS
KCI
- Journal Title
- JOURNAL OF THE KOREAN PHYSICAL SOCIETY
- Volume
- 72
- Number
- 4
- Start Page
- 508
- End Page
- 514
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/77914
- DOI
- 10.3938/jkps.72.508
- ISSN
- 0374-4884
- Abstract
- Trap levels which are deep or shallow play an important role in the electrical and the optical properties of a semiconductor; thus, a trap level analysis is very important in most semiconductor devices. Deep-level defects in CdZnTe are essential in Fermi level pinning at the middle of the bandgap and are responsible for incomplete charge collection and polarization effects. However, a deep level analysis in semi-insulating CdZnTe (CZT) is very difficult. Theoretical capacitance calculation for a metal/insulator/CZT (MIS) device with deep-level defects exhibits inflection points when the donor/acceptor level crosses the Fermi level in the surface-charge layer (SCL). Three CZT samples with different resistivities, 2 x 10(4) (n-type), 2 x 10(6) (p-type), and 2 x 10(10) (p-type) Omega center dot cm, were used in fabricating the MIS devices. These devices showed several peaks in their capacitance measurements due to upward/downward band bending that depend on the surface potential. Theoretical and experimental capacitance measurements were in agreement, except in the fully compensated case.
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