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Reconfigurable Si Nanowire Nonvolatile Transistors

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dc.contributor.authorPark, So Jeong-
dc.contributor.authorJeon, Dae-Young-
dc.contributor.authorPiontek, Sabrina-
dc.contributor.authorGrube, Matthias-
dc.contributor.authorOcker, Johannes-
dc.contributor.authorSessi, Violetta-
dc.contributor.authorHeinzig, Andre-
dc.contributor.authorTrommer, Jens-
dc.contributor.authorKim, Gyu-Tae-
dc.contributor.authorMikolajick, Thomas-
dc.contributor.authorWeber, Walter M.-
dc.date.accessioned2021-09-02T17:17:01Z-
dc.date.available2021-09-02T17:17:01Z-
dc.date.created2021-06-16-
dc.date.issued2018-01-
dc.identifier.issn2199-160X-
dc.identifier.urihttps://scholar.korea.ac.kr/handle/2021.sw.korea/78551-
dc.description.abstractReconfigurable transistors merge unipolar p- and n-type characteristics of field-effect transistors into a single programmable device. Combinational circuits have shown benefits in area and power consumption by fine-grain reconfiguration of complete logic blocks at runtime. To complement this volatile programming technology, a proof of concept for individually addressable reconfigurable nonvolatile transistors is presented. A charge-trapping stack is incorporated, and four distinct and stable states in a single device are demonstrated.-
dc.languageEnglish-
dc.language.isoen-
dc.publisherWILEY-
dc.subjectSILICON NANOWIRE-
dc.subjectSONOS MEMORY-
dc.subjectBARRIER-
dc.titleReconfigurable Si Nanowire Nonvolatile Transistors-
dc.typeArticle-
dc.contributor.affiliatedAuthorPark, So Jeong-
dc.contributor.affiliatedAuthorKim, Gyu-Tae-
dc.identifier.doi10.1002/aelm.201700399-
dc.identifier.scopusid2-s2.0-85038089904-
dc.identifier.wosid000419670400019-
dc.identifier.bibliographicCitationADVANCED ELECTRONIC MATERIALS, v.4, no.1-
dc.relation.isPartOfADVANCED ELECTRONIC MATERIALS-
dc.citation.titleADVANCED ELECTRONIC MATERIALS-
dc.citation.volume4-
dc.citation.number1-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaScience & Technology - Other Topics-
dc.relation.journalResearchAreaMaterials Science-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryNanoscience & Nanotechnology-
dc.relation.journalWebOfScienceCategoryMaterials Science, Multidisciplinary-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusSILICON NANOWIRE-
dc.subject.keywordPlusSONOS MEMORY-
dc.subject.keywordPlusBARRIER-
dc.subject.keywordAuthorintrinsic silicon nanowires-
dc.subject.keywordAuthornonvolatile transistors-
dc.subject.keywordAuthorreconfigurable field effect transistors-
dc.subject.keywordAuthorreconfigurable memory-
dc.subject.keywordAuthorSchottky barrier-
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