A 2-Gb/s/ch Data-Dependent Swing-Limited On-Chip Signaling for Single-Ended Global I/O in SDRAM
- Authors
- You, Jungtaek; Song, Junyoung; Kim, Chulwoo
- Issue Date
- 10월-2017
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- Memory; on-chip signaling; single-ended global I/O; synchronous dynamic random access memory (SDRAM)
- Citation
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.64, no.10, pp.1207 - 1211
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
- Volume
- 64
- Number
- 10
- Start Page
- 1207
- End Page
- 1211
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/82039
- DOI
- 10.1109/TCSII.2015.2483158
- ISSN
- 1549-7747
- Abstract
- This brief proposes a data-dependent swing-limited on-chip signaling for single-ended global I/O in the SDRAM in a 0.13-mu m CMOS technology. The SDRAM has multiple global I/O lines for sending and receiving data, which results in a large delay deviation owing to the multi-drop bus topology and a large RC load. Minimizing the delay and its deviation improves the speed of the SDRAM. With the proposed technique, the maximum speed is 2 Gb/s/ch, which is increased by more than 120% under the same channel condition. The power consumption is also reduced compared to that of the conventional scheme; the energy efficiency is 104 fJ/b/mm, respectively.
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