A D-Band CMOS Amplifier With a New Dual-Frequency Interstage Matching Technique
- Authors
- Kim, Dong-Hyun; Kim, Doyoon; Rieh, Jae-Sung
- Issue Date
- 5월-2017
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- Amplifier; millimeter-wave circuits; wideband
- Citation
- IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.65, no.5, pp.1580 - 1588
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
- Volume
- 65
- Number
- 5
- Start Page
- 1580
- End Page
- 1588
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/83510
- DOI
- 10.1109/TMTT.2017.2655508
- ISSN
- 0018-9480
- Abstract
- A new interstage matching technique has been proposed and successfully applied to a D-band amplifier in a 65-nm CMOS technology. The proposed technique is based on a simultaneous conjugate matching at the interstages of multistage amplifiers at two frequencies, resulting in an increased bandwidth. The six-stage amplifier designed based on this technique shows a peak gain of 13.8 dB at 113.7 GHz with a 3-dB bandwidth of 11.2 GHz (110.6-121.8 GHz) without balun loss compensation, while consuming a dc power of 40 mW. Measured noise figure shows a minimum value of 10.8 dB at 115 GHz. The output P-1 dB and the saturation output power P-sat are -14 and -3 dBm, respectively. The circuit occupies an area of 1100 x 550 mu m(2).
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Collections - College of Engineering > School of Electrical Engineering > 1. Journal Articles
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