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Impact of series resistance on the operation of junctionless transistors
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Jeon, Dae-Young | - |
| dc.contributor.author | Park, So Jeong | - |
| dc.contributor.author | Mouis, Mireille | - |
| dc.contributor.author | Barraud, Sylvain | - |
| dc.contributor.author | Kim, Gyu-Tae | - |
| dc.contributor.author | Ghibaudo, Gerard | - |
| dc.date.accessioned | 2021-09-03T09:13:59Z | - |
| dc.date.available | 2021-09-03T09:13:59Z | - |
| dc.date.created | 2021-06-16 | - |
| dc.date.issued | 2017-03 | - |
| dc.identifier.issn | 0038-1101 | - |
| dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/84367 | - |
| dc.description.abstract | Transconductance (g(m)) and its derivative (dg(m)/dV(g)) of junctionless transistors (JLTs), considered as a possible candidate for future CMOS technology, show their unique operation properties such as bulk neutral and surface accumulation conduction. However, source/drain series resistance (R-sd) causes significant degradation of intrinsic g(m) and dg(m)/dV(g) behavior in JLTs. In this letter, the Rsd effects on the operation of JLTs were investigated in detail and also verified with analytical modeling equations. This work provides helpful information for a better understanding of the operation mechanism of JLTs with de-embedded R-sd effects. (C) 2016 Elsevier Ltd. All rights reserved. | - |
| dc.language | English | - |
| dc.language.iso | en | - |
| dc.publisher | PERGAMON-ELSEVIER SCIENCE LTD | - |
| dc.subject | NANOWIRE TRANSISTORS | - |
| dc.subject | NM | - |
| dc.title | Impact of series resistance on the operation of junctionless transistors | - |
| dc.type | Article | - |
| dc.contributor.affiliatedAuthor | Kim, Gyu-Tae | - |
| dc.identifier.doi | 10.1016/j.sse.2016.12.004 | - |
| dc.identifier.scopusid | 2-s2.0-85008417721 | - |
| dc.identifier.wosid | 000394402800017 | - |
| dc.identifier.bibliographicCitation | SOLID-STATE ELECTRONICS, v.129, pp.103 - 107 | - |
| dc.relation.isPartOf | SOLID-STATE ELECTRONICS | - |
| dc.citation.title | SOLID-STATE ELECTRONICS | - |
| dc.citation.volume | 129 | - |
| dc.citation.startPage | 103 | - |
| dc.citation.endPage | 107 | - |
| dc.type.rims | ART | - |
| dc.type.docType | Article | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalResearchArea | Physics | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
| dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
| dc.subject.keywordPlus | NANOWIRE TRANSISTORS | - |
| dc.subject.keywordPlus | NM | - |
| dc.subject.keywordAuthor | Junctionless transistors (JLTs) | - |
| dc.subject.keywordAuthor | Bulk neutral conduction | - |
| dc.subject.keywordAuthor | Series resistance (R-sd) | - |
| dc.subject.keywordAuthor | Analytical modeling | - |
| dc.subject.keywordAuthor | De-embedded Rsd effects | - |
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