Towards refresh-optimized EDRAM-based caches with a selective fine-grain round-robin refresh scheme
- Authors
- Kong, Joonho; Gong, Young-Ho; Chung, Sung Woo
- Issue Date
- 3월-2017
- Publisher
- ELSEVIER SCIENCE BV
- Keywords
- Embedded dynamic random access Memory; Refresh; Last-level cache; Performance; Energy-efficiency
- Citation
- MICROPROCESSORS AND MICROSYSTEMS, v.49, pp.95 - 104
- Indexed
- SCIE
SCOPUS
- Journal Title
- MICROPROCESSORS AND MICROSYSTEMS
- Volume
- 49
- Start Page
- 95
- End Page
- 104
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/84376
- DOI
- 10.1016/j.micpro.2016.11.007
- ISSN
- 0141-9331
- Abstract
- Recently, EDRAM cells have gained much attention as a promising alternative to construct on-chip memories. However, due to inherent characteristics of DRAM cells, they need to be refreshed periodically, causing a huge refresh energy burden. Particularly, employing EDRAM cells in large-scale last-level caches will make refresh burden much higher due to their large capacity. In this paper, we propose a selective fine-grain round-robin refresh scheme for both performance improvement and refresh energy reduction. To reduce bank conflicts between normal cache accesses and refresh operations, we employ a refresh scheme which refreshes cache lines in a bank-wise round-robin fashion. We also apply a selective refresh depending on the inclusive information in cache hierarchies. For the data which reside in both LLC and upper-level cache (i.e., L2 cache), the data access will be filtered by' the upper-level cache. Based on this insight, we skip the refresh to the cache block in the EDRAM-based LLC which also exists in the upper-level caches. By doing so, we can reduce unnecessary refresh operations in EDRAM-based LLCs. According to our evaluation, our proposed scheme improves performance by 7.3% and reduces energy per instruction by 13.3% compared to the baseline all-bank refresh scheme. (C) 2016 Elsevier B.V. All rights reserved.
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