Contact Resistance Reduction Using Dielectric Materials of Nanoscale Thickness on Silicon for Monolithic 3D Integration

Abstract

In this work, we demonstrated the characteristics of metal-interlayer-semiconductor (MIS) structures using various dielectric materials of nanoscale thickness, in particular HfO2, Al2O3, ZnO, and TiO2, for contact resistivity reduction of silicon (Si) source/drain (S/D) ohmic contacts. The ultrathin dielectric materials can induce Fermi-level unpinning between the metal and the Si by preventing the penetration of metal-induced gap states (MIGS) into the Si. n-Si (7x10(18) cm(-3)) and n(+)-Si (1x10(21) cm(-3)) were used to confirm the characteristics of the MIS structures and to achieve low specific contact resistivity (rho(c)), respectively. The Ti/Al2O3 (2 nm)/n(+)-Si contact showed a low rho(c) of 5.1x10(-8) Omega.cm(2) with high thermal stability, about 125 times lower rho(c) than that of a metal-semiconductor (MS) contact. These results suggest that the proposed non-alloyed MIS contact can be incorporated into monolithic three-dimensional (3D) complementary metal-oxide-semiconductor (CMOS) integration technologies.