Fermi-Level Unpinning Using a Ge-Passivated Metal-Interlayer-Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Seung-Hwan | - |
dc.contributor.author | Kim, Gwang-Sik | - |
dc.contributor.author | Kim, Jeong-Kyu | - |
dc.contributor.author | Park, Jin-Hong | - |
dc.contributor.author | Shin, Changhwan | - |
dc.contributor.author | Choi, Changhwan | - |
dc.contributor.author | Yu, Hyun-Yong | - |
dc.date.accessioned | 2021-09-04T13:01:47Z | - |
dc.date.available | 2021-09-04T13:01:47Z | - |
dc.date.created | 2021-06-18 | - |
dc.date.issued | 2015-09 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/92587 | - |
dc.description.abstract | We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal-interlayer-semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge/n-GaAs (similar to 2 x 10(18) cm(-3)) structure exhibits a similar to 1660x reduction compared with that of a Ti/n-GaAs structure. These results suggest that the proposed structure shows promise as a nonalloyed ohmic contact in high-electron-mobility transistors. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Fermi-Level Unpinning Using a Ge-Passivated Metal-Interlayer-Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Yu, Hyun-Yong | - |
dc.identifier.doi | 10.1109/LED.2015.2453479 | - |
dc.identifier.scopusid | 2-s2.0-84940385435 | - |
dc.identifier.wosid | 000360273900004 | - |
dc.identifier.bibliographicCitation | IEEE ELECTRON DEVICE LETTERS, v.36, no.9, pp.884 - 886 | - |
dc.relation.isPartOf | IEEE ELECTRON DEVICE LETTERS | - |
dc.citation.title | IEEE ELECTRON DEVICE LETTERS | - |
dc.citation.volume | 36 | - |
dc.citation.number | 9 | - |
dc.citation.startPage | 884 | - |
dc.citation.endPage | 886 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordAuthor | Fermi level unpinning | - |
dc.subject.keywordAuthor | gallium arsenide | - |
dc.subject.keywordAuthor | germanium | - |
dc.subject.keywordAuthor | specific contact resistivity | - |
dc.subject.keywordAuthor | passivation | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
145 Anam-ro, Seongbuk-gu, Seoul, 02841, Korea+82-2-3290-2963
COPYRIGHT © 2021 Korea University. All Rights Reserved.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.