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The Efficacy of Metal-Interfacial Layer-Semiconductor Source/Drain Structure on Sub-10-nm n-Type Ge FinFET Performances

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dc.contributor.authorKim, Jeong-Kyu-
dc.contributor.authorKim, Gwang-Sik-
dc.contributor.authorNam, Hyohyun-
dc.contributor.authorShin, Changhwan-
dc.contributor.authorPark, Jin-Hong-
dc.contributor.authorKim, Jong-Kook-
dc.contributor.authorCho, Byung Jin-
dc.contributor.authorSaraswat, Krishna C.-
dc.contributor.authorYu, Hyun-Yong-
dc.date.accessioned2021-09-05T02:33:45Z-
dc.date.available2021-09-05T02:33:45Z-
dc.date.created2021-06-15-
dc.date.issued2014-12-
dc.identifier.issn0741-3106-
dc.identifier.urihttps://scholar.korea.ac.kr/handle/2021.sw.korea/96653-
dc.description.abstractWe investigate the impact of metal-interfacial layer-semiconductor source/drain (M-I-S S/D) structure with heavily doped n-type interfacial layer (n(+)-IL) or with undoped IL on sub-10-nm n-type germanium (Ge) FinFET device performance using 3-D TCAD simulations. Compared to the metal-semiconductor S/D structure, the M-I-S S/D structures provide much lower contact resistivity. Especially, theM-I-S S/D structure with n(+)-IL provides much lower contact resistivity, resulting in similar to 5x lower contact resistivity than 1x10(-8) Omega-cm(2), specified in International Technology Roadmap for Semiconductors. In addition, we found that the M-I-S structure with n(+)-IL remarkably suppresses the sensitivity of contact resistivity to S/D doping concentration.-
dc.languageEnglish-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectGERMANIDE-
dc.titleThe Efficacy of Metal-Interfacial Layer-Semiconductor Source/Drain Structure on Sub-10-nm n-Type Ge FinFET Performances-
dc.typeArticle-
dc.contributor.affiliatedAuthorKim, Jong-Kook-
dc.contributor.affiliatedAuthorYu, Hyun-Yong-
dc.identifier.doi10.1109/LED.2014.2364574-
dc.identifier.scopusid2-s2.0-84913597110-
dc.identifier.wosid000345575400008-
dc.identifier.bibliographicCitationIEEE ELECTRON DEVICE LETTERS, v.35, no.12, pp.1185 - 1187-
dc.relation.isPartOfIEEE ELECTRON DEVICE LETTERS-
dc.citation.titleIEEE ELECTRON DEVICE LETTERS-
dc.citation.volume35-
dc.citation.number12-
dc.citation.startPage1185-
dc.citation.endPage1187-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusGERMANIDE-
dc.subject.keywordAuthorCMOS-
dc.subject.keywordAuthorcontact resistance-
dc.subject.keywordAuthorFinFET-
dc.subject.keywordAuthorgermanium-
dc.subject.keywordAuthorinterfacial layer-
dc.subject.keywordAuthorMOSFET-
dc.subject.keywordAuthorsource/drain-
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