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Vertical NOR-logic circuits constructed using nanoparticle films on plastic substrates

Authors
Choi, JinyongYun, JunggwonCho, KyoungahKim, Sangsig
Issue Date
8월-2014
Publisher
IOP PUBLISHING LTD
Citation
JAPANESE JOURNAL OF APPLIED PHYSICS, v.53, no.8
Indexed
SCIE
Journal Title
JAPANESE JOURNAL OF APPLIED PHYSICS
Volume
53
Number
8
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/97821
DOI
10.7567/JJAP.53.08NE02
ISSN
0021-4922
Abstract
In this study, a NOR-logic circuit is constructed by the vertical stacking of three individual thin-film transistors (TFTs) with the channels of solution-processed chalcogenide nanoparticle (NP) films on a plastic substrate. The NOR-logic circuit consists of two p-type HgTe NP-based TFTs, which act as drivers, and one n-type HgSe NP-based TFT, which plays the role of an active load. The logic operation is observed with a substantial difference in V-out between the logic state of "00" and the other logic states, and the logic swing is similar to 60%. (C) 2014 The Japan Society of Applied Physics
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공과대학 (전기전자공학부)
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