Sign-Select Lookahead CORDIC based High-Speed QR Decomposition Architecture for MIMO Receiver Applications

Abstract

This paper presents a high-speed OR decomposition architecture for the multi-input-multi-output (MIMO) receiver based on Givens rotation. Under fast-varying channel, since the inverse matrix calculation has to be performed frequently in MIMO receiver, a high performance and low latency OR decomposition module is highly required. The proposed OR decomposition architecture is composed of Sign-Select Lookahead (SSL) coordinate rotation digital computer (CORDIC). In the SSL-CORDIC, the sign bits, which are computed ahead to select which direction to rotate, are used to select one of the last iteration results, therefore, the data dependencies on the previous iterations are efficiently removed. Our proposed OR decomposition module is implemented using TSMC 0.25 mu m CMOS process. Experimental results show that the proposed OR architecture achieves 34.83% speed-up over the Compact CORDIC based architecture for the 4 x 4 matrix decomposition.