A New Class of Charge-Trap Flash Memory With Resistive Switching Mechanisms
- Authors
- An, Ho-Myoung; Lee, Eui Bok; Kim, Hee-Dong; Seo, Yu Jeong; Kim, Tae Geun
- Issue Date
- 10월-2010
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- Charge-trap Flash (CTF); resistive random access memory (ReRAM); resistive switching; silicon/oxide/nitride/oxide/silicon (SONOS); universal memory
- Citation
- IEEE TRANSACTIONS ON ELECTRON DEVICES, v.57, no.10, pp.2398 - 2404
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE TRANSACTIONS ON ELECTRON DEVICES
- Volume
- 57
- Number
- 10
- Start Page
- 2398
- End Page
- 2404
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/115610
- DOI
- 10.1109/TED.2010.2063706
- ISSN
- 0018-9383
- Abstract
- This paper presents a new class of charge-trap Flash memory device with resistive switching mechanisms. We propose a fused memory scheme using a structure of metal/Pr-0.7 Ca-0.3 MnO3 (PCMO)/nitride/oxide/silicon to graft fast-switching features of resistive random access memory onto high-density silicon/oxide/nitride/oxide/silicon memory structures. In this scheme, both program and erase (P/E) are performed by the conduction of the carriers that are injected from the gate into the nitride layer through the PCMO, which is a resistive switching material; the resistance state determines whether a program or erase function is performed. In the proposed memory devices, we observed improved memory characteristics, including the current-voltage hysteresis having a resistive ratio exceeding three orders of magnitude at a set voltage of +/- 4.5 V, a memory window of 2.3 V, a P/E speed of 100 ns/1 ms, data retention of ten years, and endurance of 10(5) P/E cycles. This approach will offer critical clues about how one can best implement universal features of nonvolatile memories in a single chip.
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