P-type silicon nanowire-based nano-floating gate memory with Au nanoparticles embedded in Al2O3 gate layers
- Authors
- Yoon, Changjoon; Cho, Kyoungah; Lee, Jae-Hyun; Whang, Dongmok; Moon, Byung-Moo; Kim, Sangsig
- Issue Date
- 5월-2010
- Publisher
- ELSEVIER SCIENCE BV
- Keywords
- Silicon; Nanowire; Nanoparticle; Memory
- Citation
- SOLID STATE SCIENCES, v.12, no.5, pp.745 - 749
- Indexed
- SCIE
SCOPUS
- Journal Title
- SOLID STATE SCIENCES
- Volume
- 12
- Number
- 5
- Start Page
- 745
- End Page
- 749
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/116484
- DOI
- 10.1016/j.solidstatesciences.2010.02.026
- ISSN
- 1293-2558
- Abstract
- P-type Si nanowire (NW)-based nano-floating gate memory (NFGM) with Au nanoparticles (NPs) embedded in Al2O3 gate layers is characterized in this study. The electrical characteristics of a representative p-type Si NW-based NFGM exhibit a counterclockwise hysteresis loop indicating the trapping and detrapping of electrons in the Au NP nodes of the NFGM device. The threshold voltage shift of the device is 5.4 V and the device has good retention over a lapse of time of 5 x 10(4) s. On the other hand, the p-type Si NW-based top-gate device without any Au NPs does not exhibit any significant threshold voltage shift. This observation reveals that the memory behavior of the p-type Si NW-based NFGM is due to the trapping and detrapping of charge carriers in the Au NPs. (C) 2010 Elsevier Masson SAS. All rights reserved.
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