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Influence of plasma-etch damage on the interface states in SOI structures investigated by capacitance-voltage measurements and simulations

Authors
Jo, Yeong-DeukKoh, Jung-HyukHa, Jae-GeunKim, Ji-HongCho, Dae-HyungMoon, Byung-MooKoo, Sang-Mo
Issue Date
Dec-2009
Publisher
IOP PUBLISHING LTD
Citation
SEMICONDUCTOR SCIENCE AND TECHNOLOGY, v.24, no.12
Indexed
SCIE
SCOPUS
Journal Title
SEMICONDUCTOR SCIENCE AND TECHNOLOGY
Volume
24
Number
12
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/118836
DOI
10.1088/0268-1242/24/12/125005
ISSN
0268-1242
Abstract
Au/SiO2/n-Si metal-oxide-silicon-on-insulator (MOSOI) capacitors were fabricated to study the damage caused by reactive ion etching (RIE) on (1 1 0) oriented silicon-on-insulator (SOI) substrates. The MOSOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching treatment. The measurements revealed that C-V curves significantly change and a negative voltage shift occurs for plasma-damaged capacitors. The simulated band diagram profiles and potential distribution of the corresponding structures indicate that the C-V shift is mainly due to the removal of a parasitic depletion capacitance (C-p) in the substrate, when the interface charges (Q(f)) are present at the gate oxide/SOI interface. For etch-damaged MOSOI samples, the surface roughness and the interface charges (Q(f)) have been found to increase by similar to 1.94 x 10(12) cm(-2) with respect to the reference devices, whereas the increase was reduced for sacrificial-oxidation treated samples, which implies a recovery from the plasma-induced etch damage on SOI structures.
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