Nanocrystal-mediated charge screening effects in nanowire field-effect transistors
- Authors
- Yoon, C. J.; Yeom, D. H.; Jeong, D. Y.; Lee, M. G.; Moon, B. M.; Kim, S. S.; Choi, C. Y.; Koo, S. M.
- Issue Date
- 15-3월-2009
- Publisher
- AMER INST PHYSICS
- Keywords
- cadmium compounds; coatings; electron emission; electron traps; II-VI semiconductors; nanoelectronics; nanofabrication; nanowires; numerical analysis; semiconductor quantum wires; static induction transistors; wide band gap semiconductors; zinc compounds
- Citation
- JOURNAL OF APPLIED PHYSICS, v.105, no.6
- Indexed
- SCIE
SCOPUS
- Journal Title
- JOURNAL OF APPLIED PHYSICS
- Volume
- 105
- Number
- 6
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/120419
- DOI
- 10.1063/1.3093692
- ISSN
- 0021-8979
- Abstract
- ZnO nanowire field-effect transistors having an omega-shaped floating gate (OSFG) have been successfully fabricated by directly coating CdTe nanocrystals (similar to 6 +/- 2.5 nm) at room temperature, and compared to simultaneously prepared control devices without nanocrystals. Herein, we demonstrate that channel punchthrough may occur when the depletion from the OSFG takes place due to the trapped charges in the nanocrystals. Electrical measurements on the OSFG nanowire devices showed static-induction transistorlike behavior in the drain output I-DS-V-DS characteristics and a hysteresis window as large as similar to 3.1 V in the gate transfer I-DS-V-GS characteristics. This behavior is ascribed to the presence of the CdTe nanocrystals, and is indicative of the trapping and emission of electrons in the nanocrystals. The numerical simulations clearly show qualitatively the same characteristics as the experimental data and confirm the effect, showing that the change in the potential distribution across the channel, induced by both the wrapping-around gate and the drain, affects the transport characteristics of the device. The cross-sectional energy band and potential profile of the OSFG channel corresponding to the "programed (noncharged)" and "erased (charged)" operations for the device are also discussed on the basis of the numerical capacitance-voltage simulations.
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