Electrical characteristics of polycrystalline Si layers embedded into high-k Al2O3 gate layers
- Authors
- Park, Byoungjun; Cho, Kyoungah; Kim, Sangsig
- Issue Date
- 30-9월-2008
- Publisher
- ELSEVIER SCIENCE BV
- Keywords
- polycrystalline silicon; memory; high-k
- Citation
- APPLIED SURFACE SCIENCE, v.254, no.23, pp.7905 - 7908
- Indexed
- SCIE
SCOPUS
- Journal Title
- APPLIED SURFACE SCIENCE
- Volume
- 254
- Number
- 23
- Start Page
- 7905
- End Page
- 7908
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/122689
- DOI
- 10.1016/j.apsusc.2008.03.064
- ISSN
- 0169-4332
- Abstract
- The electrical characteristics of polycrystalline Si (poly Si) layers embedded into high-k Al2O3 (alumina) gate layers are investigated in this work. The capacitance versus voltage (C-V) curves obtained from the metal-alumina-polysilicon-alumina-silicon (MASAS) capacitors exhibit significant threshold voltage shifts, and the width of their hysteresis window is dependent on the range of the voltage sweep. The counterclockwise hysteresis observed in the C-V curves indicates that electrons originating from the p-type Si substrate in the inversion condition are trapped in the floating gate layer consisting of the poly Si layer present between the top and bottom Al2O3 layers in the MASAS capacitor. Also, current versus voltage (I-V) measurements are performed to examine the electrical characteristics of the fabricated capacitors. The I-V measurements reveal that our MASAS capacitors show a very low leakage current density, compared to the previously reported results. (C) 2008 Elsevier B.V. All rights reserved.
- Files in This Item
- There are no files associated with this item.
- Appears in
Collections - College of Engineering > School of Electrical Engineering > 1. Journal Articles
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.