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Surface-Potential-Based Analytical Model of Low-Frequency Noise for Planar-Type Tunnel Field-Effect Transistors
- Authors
- Park, Yeong-Hun; Yi, Boram; Kim, Seung-Hwan; Shim, Ju-Hyun; Song, Hyeong-Sub; Song, Hyun-Dong; Shin, Hyun-Jin; Lee, Hi-Deok; Yang, Ji-Woon
- Issue Date
- 8월-2021
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- TFETs; Logic gates; Semiconductor device modeling; Analytical models; Integrated circuit modeling; Computational modeling; Tunneling; Band-to-band tunneling (BTBT); compact model; flicker noise; low-frequency noise (LFN); tunneling FET
- Citation
- IEEE TRANSACTIONS ON ELECTRON DEVICES, v.68, no.8, pp.4051 - 4056
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE TRANSACTIONS ON ELECTRON DEVICES
- Volume
- 68
- Number
- 8
- Start Page
- 4051
- End Page
- 4056
- ISSN
- 0018-9383
- Abstract
- Analytical models of low-frequency noise (LFN) characteristics for planar-type tunnel field-effect-transistors (TFETs) are proposed. A surface-potential-based current-voltage model is developed to physically represent the current fluctuation due to charge trapping/detrapping in the gate dielectric. An LFN model can be analytically derived from the current fluctuation with a reasonable approximation. The proposed model is verified using Technology Computer Aided Design (TCAD) and measurement data, which are in good agreement with each other. The analytical model can not only serve as a valuable reference and tool for low-power analog circuit design but also provide physical insights into the LFN of TFETs.
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