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Defect Engineering for High Performance and Extremely Reliable a-IGZO Thin-Film Transistor in QD-OLED

Authors
Park, Young-GilCho, Dong YeonKim, RanKim, Kang HyunLee, Ju WonLee, Doo HyoungJeong, Soo ImAhn, Na RiLee, Woo-GeunChoi, Jae BeomKim, Min JungKim, DonghyunJin, SeungheePark, Dong GeunKim, JungchunChoi, SaeyanBang, SeainLee, Jae Woo
Issue Date
Jul-2022
Publisher
WILEY
Keywords
a-IGZO TFT; ESR; LFN; oxygen vacancy; TDS
Citation
ADVANCED ELECTRONIC MATERIALS, v.8, no.7
Indexed
SCIE
SCOPUS
Journal Title
ADVANCED ELECTRONIC MATERIALS
Volume
8
Number
7
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/146626
DOI
10.1002/aelm.202101273
ISSN
2199-160X
Abstract
An amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT), which exhibits the best electrical stability (PBTS <= 0.009 V), is implemented to create quantum-dot organic light-emitting diode product. Electrical stability has been explained through various mechanisms involving defects related to oxygen and hydrogen. The defects of a-IGZO are identified and the parameters of the deposition process are utilized to obtain V-o(+) and V-Zn(-) values of 1.7 x 10(17) and 2.4 x 10(18) spins cm(-3), respectively, which are quantified using electron spin resonance for the first time. The defects of the gate insulator (GI) in the upper and lower parts of the a-IGZO TFT and the oxygen and hydrogen inflow/diffusion generated during the process are also controlled. From well-controlled a-IGZO and GI, the defect density at the top-channel interface and near-interface of the a-IGZO TFT is reduced by 85% and 70%, respectively. The defects in the bottom-channel are also reduced by 83% and 75% for the interface and near-interface, respectively. Electrical stability is secured by controlling V-o(+) and V-Zn(-) and reducing sub-gap trap density among interface defects that are not directly observed until now. In this paper, it is reported that the best a-IGZO TFT performance is achieved through defect engineering.
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