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A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-ProcessorsA Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors
- Alternative Title
- A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors
- Authors
- Junghee Lee
- Issue Date
- 20-5월-2016
- Publisher
- Association for Computing Machinery
- Citation
- ACM International Conference on Great Lakes Symposium on VLSI
- Conference Name
- ACM International Conference on Great Lakes Symposium on VLSI
- Place
- US
- Conference Date
- 2016-05-18
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