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Forming-ready resistance random access memory using randomly pre-grown conducting filaments via pre-forming

Authors
Jeon, Dong SuPark, Ju HyunKang, Dae YunDongale, Tukaram D.Kim, Tae Geun
Issue Date
5월-2020
Publisher
ELSEVIER SCI LTD
Keywords
Resistive switching; Crossbar array; Novel pre-forming method; Resistive memory
Citation
MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, v.110
Indexed
SCIE
SCOPUS
Journal Title
MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING
Volume
110
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/56103
DOI
10.1016/j.mssp.2020.104951
ISSN
1369-8001
Abstract
The electrical forming is among the issues to be considered during practical applications of resistive switching random access memory (ReRAM) arrays. The typical electrical forming process increases the power budget and circuit complexity of the ReRAM arrays. From the material engineering point of view, most competitive ReRAM materials require higher forming voltages than the set voltages for efficient device operation. Considering these bottlenecks, herein, we report a novel method for a substantial reduction of the forming voltage to a range close to the set voltage. The proposed forming method covers cells in more than the 700 mu m range, using a one-time pre-forming process. Randomly grown filaments completely formed over the active layers during pre-forming are reused for device operation without the need for further forming. To validate this method, we fabricated 8. 8 ReRAM arrays with two conductive filament-based mechanisms namely valance change and electrochemical migration and each of the eight cells in line was set as the test sample to confirm the completion of the forming. All the eight cells in line had initial set voltages of similar to 1 V, while the reference samples had forming voltages of similar to 3 V. The results indicate that electrical forming had already occurred in the eight cells under the one-time bias application; thus, a range of cells spread over more than 700 mu m was formed with the proposed method. This method is advantageous for the circuit design of ReRAM arrays with forming-free behavior.
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공과대학 (전기전자공학부)
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