Random Dopant Fluctuation-Induced Threshold Voltage Variation-Immune Ge FinFET With Metal-Interlayer-Semiconductor Source/Drain
- Authors
- Shin, Changho; Kim, Jeong-Kyu; Kim, Gwang-Sik; Lee, Hyunjae; Shin, Changhwan; Kim, Jong-Kook; Cho, Byung Jin; Yu, Hyun-Yong
- Issue Date
- 11월-2016
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- CMOS; FinFET; germanium; interlayer; random dopant fluctuation (RDF); threshold voltage variation
- Citation
- IEEE TRANSACTIONS ON ELECTRON DEVICES, v.63, no.11, pp.4167 - 4172
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE TRANSACTIONS ON ELECTRON DEVICES
- Volume
- 63
- Number
- 11
- Start Page
- 4167
- End Page
- 4172
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/87038
- DOI
- 10.1109/TED.2016.2606511
- ISSN
- 0018-9383
- Abstract
- The impact of process-induced random dopant fluctuation (RDF)-induced threshold voltage (Vth) variation on the performance of 7-nm n-type germanium (Ge) FinFETs with and without a metal-interlayer-semiconductor (MIS) source/drain (S/D) structure is investigated using 3-D TCAD simulations. In order to reduce the RDF-induced Vth variation, an MIS S/D structure with a heavily doped n-type zinc oxide (ZnO) interlayer is used in the S/D region of the Ge FinFET. Thus, without performance degradation, the Ge FinFET with an MIS S/D structure achieves approximately threefold reduction in the RDF-induced Vth variation (versus without an MIS S/D structure). The impact of various fin parameters (i. e., fin height and fin width) on the RDF-induced Vth variation is also investigated. It is noteworthy that variation is suppressed as the fin height (fin width) increases (decreases).
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