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A New Approach on Design of a Digital Phase-Locked Loop

Authors
Ahn, Choon KiShi, PengYou, Sung Hyun
Issue Date
5월-2016
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Digital phase-locked loop (DPLL); dead-beat property; finite impulse response (FIR) structure; H-infinity performance
Citation
IEEE SIGNAL PROCESSING LETTERS, v.23, no.5, pp.600 - 604
Indexed
SCIE
SCOPUS
Journal Title
IEEE SIGNAL PROCESSING LETTERS
Volume
23
Number
5
Start Page
600
End Page
604
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/88848
DOI
10.1109/LSP.2016.2542291
ISSN
1070-9908
Abstract
In this letter, we propose a new approach to the design of a digital phase-locked loop (DPLL) with a finite impulse response (FIR) structure, deadbeat property, and H-infinity performance. This DPLL is called the deadbeat H-infinity FIR DPLL (DHFDPLL). The proposed DHFDPLL ensures the H-infinity performance against incorrect information on noise and has intrinsic robustness against quantization effects because of the FIR structure. Demonstrative simulations are provided to show that the DHFDPLL exhibits excellent robustness against effects of incorrect noise and quantization compared with the existing DPLLs.
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공과대학 (전기전자공학부)
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